LRCX and the memory equipment cycle: why HBM changes the math
Lam Research derives most of its revenue from the tools that etch and deposit layers in NAND flash and DRAM memory chips. Historically, this made LRCX a pure-play on the memory capex cycle — it fell hard when memory companies cut spending and recovered sharply when memory pricing recovered and utilization rates climbed. That cyclicality has not disappeared, but it has been augmented by a structural new driver: HBM (high-bandwidth memory).
HBM — the stacked DRAM used inside NVIDIA H100 and H200 AI accelerators — requires significantly more etch and deposition steps per die than standard DRAM, creating more equipment revenue per wafer. As AI accelerator demand drives SK Hynix, Samsung, and Micron to rapidly expand HBM capacity, LRCX benefits disproportionately because HBM production is equipment-intensive in exactly the processes Lam dominates.
- Track SK Hynix, Samsung, and Micron HBM capacity expansion announcements — these directly drive LRCX equipment orders.
- NAND capex recovery (storage demand from data centers) is the traditional LRCX cycle driver; HBM/DRAM is the incremental AI-driven driver.
- LRCX earns more revenue per wafer on HBM than on standard DRAM — watch management commentary on HBM mix shift in earnings calls.